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  l4957a up to 5a uldo linear regulator 1.5v, 1.8v, 2.5v and 3.3v fixed output voltage 3v to 14v input voltage range 200m w rdson typical @ t j = 125c 0.6v max. drop-out at 2a excellent load regulation 0.6ma quiescent current at any load short circuit protection thermal shutdown applications mother boards processor i/o & supplies low voltage memory & chip set sup- plies graphic & sound cards low voltage logic supplies post regulator for smps description the l4957a devices are u ltra l ow d rop o utput linear regulators with an internal n-channel mos of 200m w particulary suitable for low voltage/low dropout applications. operating with a input voltage from 3v to 14v they are capable to deliver up to 5a. the devices are ideal for use as one of the sup- plies required by processor, for example they are the cost effective and efficient solution for conver- sion from 3.3v (rail bus) to 2.5v @ 2.5a or to 1.5v with high current rating. fast response transient minimise the output ca- pacitor value. a minimum of 22 m f assures the stability in all load conditions. the on-chip trimming technique offers a tighter voltage reference tolerance (with 2% including line and load variation) beside to ensure a con- trolled short circuit current. thermal shutdown provides protection against overload conditions that creates excessive junction temperature. january 2002 ? l4957a gnd out in 3 2 1 c1 3v to 14v c2 v out d00in1107a typical application ordering numbers: l4957av1.5 l4957ad1.5 l4957av1.8 l4957ad1.8 l4957av2.5 l4957ad2.5 l4957av3.3 l4957ad3.3 multipower bcd technology 1 3 d 2 pak versawatt to-220 1/7
absolute maximum ratings symbol parameter value unit v in supply input voltage 16 v t i junction temperature -40 to +150 c t stg storage temperature -40 to +150 c pins connection in pre regulator v ref + - e/a out gnd d00in1108a 1 2 3 v in 10 m f current limit thermal shutdown buffer charge pump power dmos 200m w 22 m f v out r y r x block diagram out gnd in 1 3 d98in838b 2 versawatt (to220) out gnd in 1 3 d98in933a 2 d2pak pin functions pin n name function 1 in unregulated input voltage; this pin must be bypassed with a capacitor larger than 10 m f. 2 gnd to connect to ground to get 1.5v, 1.8v, 2.5v or 3.3v output. 3 out regulated output voltage. a minimum bypass capacitor of 22 m f is required to insure stability. l4957a 2/7
electrical characteristics (t j = 25c, v in = 5v, unless otherwise specified). = specifications referred to t j from 0c to +125c. symbol parameter test condition min. typ. max. unit v in operating supply voltage 3 14 v v o output voltage 3.15v < v in < 5.25v; i o = 0.1a 1.485 1.5 1.515 v v in = 3.3v 5%; 0.1a < i o < 5a 1.47 1.5 1.53 v v in = 3.3v 5% i o = 0.1a v in = 5v 5% 1.782 1.8 1.818 v v in = 3.3v 5% (0.1a < i o < 4.5a) v in = 5v 5% 0.1a < i o < 5a 1.764 1.8 1.836 v v in = 3.3v 5% i o = 0.1a v in = 5v 5% 2.475 2.5 2.525 v v in = 3.3v 5% (0.1a < i o < 2.2a) v in = 5v 5% 0.1a < i o < 5a 2.45 2.5 2.55 v v in = 5v 5% i o = 0.1a 3.267 3.3 3.333 v v in = 5v 5% 0.1a < i o < 5a 3.234 3.3 3.366 v r dson drain-source on resistance 300 m w i o current limiting 5.1 6.3 7.5 a i q quiescent current 3v < v in < 14v 0.6 2 ma ripple rejection f = 120hz, i o = 1a v in = 5v d v in = 2v pp 60 75 db thermal data symbol parameter to220 d2pak unit r th j-case thermal resistance junction-case max. 2.5 3 c/w r th j-amb thermal resistance junction-ambient max. 50 60 c/w thermal shutdown typ. 150 c thermal hysteresis typ. 20 c -40 -20 0 20 40 60 80 100 120 140 160 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 t j [c] output voltage deviation [mv] 3v < vin < 6.5v iout = 10ma figure 1: line regulation vs. junction temperature 012345 -5 -4 -3 -2 -1 0 1 2 3 4 5 iout [a] output voltage deviation [mv] vin = 5v tj = 25 c (pulsed technique has been used) vout = 1.5v figure 2: load regulation l4957a 3/7
*pulsed tecnique has been used -40 -20 0 20 40 60 80 100 120 140 160 0 1 2 3 4 5 6 7 8 9 10 tj [c] output current [a] (vin-vout) > 2v pin 2 = gnd figure 3: maximum output current vs. junction temperature vin>2.8v tj=125c tc=25c pdmax=40 w rdson limit dc operating area power dissipation limit c urrent limitation tc=70c pdmax=22 w 012345678 0 1 2 3 4 5 6 7 8 (vin - vout) [v] output current [a] figure 4: dc operating area 0 10 20 30 40 50 60 70 80 90 100 fre q uenc y [ hz ] ripple rejection [db] 1k 10 100 10k 100k vripple=3vp-p vripple=0.5vp-p cin=22uf cout=22uf vout=1.5v vinm in=3v iout=5a figure 5: ripple rejection vs. frequency 6.3 i out (a) v out (v) d00in1109 figure 6: output voltage vs. output current. (v out = 1.5v) 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 d v = vin - vo io [a ] maximum ron limits tj = 100c tj = 125c tj = 25c figure 7: maximum output current vs. drop-out voltage l4957a 4/7
versawatt (to220) dim. mm inch min. typ. max. min. typ. max. a 4.40 4.60 0.173 0.181 c 1.23 1.32 0.048 0.051 d 2.40 2.72 0.094 0.107 e 0.49 0.70 0.019 0.027 f 0.61 0.88 0.024 0.034 f1 1.14 1.70 0.044 0.067 f2 1.14 1.70 0.044 0.067 g 4.95 5.15 0.194 0.203 g1 2.40 2.70 0.094 0.106 h2 10.0 10.4 0.393 0.409 l2 16.4 0.645 l4 13.0 14.0 0.511 0.551 l5 2.65 2.95 0.104 0.116 l6 15.25 15.75 0.600 0.620 l7 6.20 6.60 0.244 0.260 l9 3.50 3.93 0.137 0.154 m 2.6 0.102 dia 3.75 3.85 0.147 0.151 m to220mec outline and mechanical data l4957a 5/7
d 2 pak outline and mechanical data a c2 d r 2.0 min. flat zone a2 v2 c a1 g l l3 l2 b b2 e 8.90 3.70 1.30 5.08 16.90 10.30 ref. dimensions millimeters inches min. typ. max. min. typ. max. a 4.30 4.60 0.169 0.181 a1 2.49 2.69 0.098 0.106 a2 0.03 0.23 0.001 0.009 b 0.70 0.93 0.027 0.037 b2 1.25 1.40 0.049 0.055 c 0.45 0.60 0.017 0.024 c2 1.21 1.36 0.047 0.054 d 8.95 9.35 0.352 0.368 e 10.00 10.28 0.393 0.405 g 4.88 5.28 0.192 0.208 l 15.00 15.85 0.590 0.624 l2 1.27 1.40 0.050 0.055 l3 1.40 1.75 0.055 0.069 r 0.40 0.016 v2 0? 8? 0? 8? l4957a 6/7
information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsib ility for the cons equences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specification mentioned in this pu blication are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectron ics products are not authorized for use as critical components in life support devices or systems without express written approval of stmicr oelectronics. the st logo is a registered trademark of stmicroelectronics ? 2002 stmicroelectronics C printed in italy C all rights reserved stmicroelectronics group of companies australia - brazil - canada - china - finland - france - germany - hong kong - india - israel - italy - japan - malaysia - malt a - morocco - singapore - spain - sweden - switzerland - united kingdom - united states. http://www.st.com l4957a 7/7


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